Fraunhofer Group for Microelectronics in cooperation with the Leibniz institutes IHP and FBH
Fraunhofer Group for Microelectronics in cooperation with the Leibniz institutes IHP and FBH

High-Performance Computing

© Colin Behrens / Pixabay

High-performance computing (HPC) is a crucial driver of digital transformation, involving highly demanding data computations within computer systems. Classical von-Neumann architectures, as known today, are specialized for specific application fields. To employ optimally matched components (computing architectures and algorithms designed in hardware-software codesign) for different application domains, novel supercomputers are modularly constructed following a building block principle.

The increasing performance of these systems significantly drives research and development in computationally and data-intensive domains. High-performance and energy-efficient processors in embedded systems, for instance, are utilized in (semi-)autonomous driving scenarios, where a large volume of data from numerous sensors needs to be reliably and instantly processed in real-time, known as Edge Computing. An example of a new generation of European processors is EPI, the European Processor Initiative, where 28 partners from ten European countries collaboratively develop high-performance computing processors and accelerator units. The EPI processors aim to efficiently execute simulation applications such as weather forecasting and flow simulations.

 

Fields of research 

  • Chip-Package-Board Co-Design
  • Utilization of Open-Source Hardware
  • Signal and Power Integrity for Electrical Connections
  • Advancement of Heterointegration (3D Integration)
  • Integration of the Chiplet Concept
  • New Interposer Technologies (Connection of Si and Organic Carriers)
  • High Reliability for Applications in the Automotive Sector

Project examples

Heterogeneous 3D integration, among others, for high-performance applications such as processors @ Fraunhofer EMFT

Among other applications, also relevant for the field of quantum computing.

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Next Generation Computing at the Edge, @ Fraunhofer EMFT

How can computing be managed close to the sensor rather than in the cloud in the future? And how can machine learning be implemented on distributed systems in such a setup? Researchers at Fraunhofer EMFT and eleven other Fraunhofer institutes are addressing these highly topical issues in the SecLearn Arrival innovation project. 

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Design and layout of integrated circuits (IC) @ Fraunhofer EMFT

Fraunhofer EMFT supports its customers in their search for an optimal system solution, a customized division between commercially available components and the development of customer-specific circuits.

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Bio4Comp - Molecular motor-driven bio-computers with Fraunhofer ENAS

This project has received funding from the European Union’s »Horizon 2020« research and innovation programme under grant agreement No. 732482.
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The Moore's Law Breakthrough: New Photonic Computing Project PHOENICS Accelerates Computing Power for Artificial Intelligence with Fraunhofer HHI

The project is funded by the Horizon 2020 Research and Innovation Programme of the European Union under grant agreement No. 101017237.
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Cluster High-Performance-Computing (HPC) @ Fraunhofer HHI

The Fraunhofer Heinrich Hertz institute runs a High Performance Computing (HPC) Cluster, providing the employees of the departments Wireless Network (WN) and Video Coding and Analytics (VCA) with the necessary computing power to run complex simulations.

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Save and flexible edge analytics platform @ Fraunhofer IIS

OGEMA was developed as a linking platform for a wide range of communication technologies, which also provides a runtime environment for local services and can be operated on various edge controllers. 

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Secure Edge Computing for IoT systems @ Fraunhofer IIS

Reliable edge computing systems are required for system integration and upgrading to Industry 4.0 capability so that the large number of different interfaces can be managed, various isolated solutions can be networked, new application programs can be integrated and IT security in plants can be taken into account.

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Evaluation platform for Multi-Access Edge Computing @ Fraunhofer IIS

Fraunhofer IIS offers an evaluation platform for MEC technologies in order to be able to test applications and their distribution in advance. The 5G Bavaria testbeds "Industry 4.0" and "Automotive" create the opportunity to create a native MEC integration and to set up different network architecture forms. 

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System Packaging @ Fraunhofer IIS/EAS

Through novel integration concepts – such as chip stacking or the use of interposers – it is possible to achieve higher data throughput while simultaneously lowering energy consumption and reducing space requirements.

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Chiplets as enablers for autonomous driving @ Fraunhofer IIS/EAS

A new system architecture approach is required and various options are available. Those range from complex systems-on-chip (SoCs) to new approaches from the packaging area, such as chiplets.

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Chiplets as a solution for the chip shortage (2021) @ Fraunhofer IIS/EAS

Whereas high-volume chip orders are likely to recover from the recent supply bottlenecks relatively quickly, companies looking to purchase ICs on a small or medium scale face the prospect of an uphill struggle.

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System-on-Chip design, including functional safety and cybersecurity for critical applications in the fields of aviation, automotive, and industry, and efficient hardware for neural network inference and training @ Fraunhofer IMS

The AIRISC family of RISC-V cores developed by Fraunhofer IMS enables efficient machine learning and AI in sensors, IoT devices, and other embedded applications. 

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RISC-V processors for safety and security @ Fraunhofer IMS

Fraunhofer IMS offers secure processor cores on the basis of open RISC-V architecture. This command set architecture allows for the development of customer-specific special processors for safety and security and a high-grade optimization of the cores to an application.

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Royalty-free RISC-V core for FPGA and ASIC @ Fraunhofer IMS

With the AIRISC core, the Fraunhofer IMS places its powerful RISC-V embedded processor core for sensor tasks under an open source license, which also allows the use for commercial products.

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RISC-V processor AIRISC accelerates sensor data processing by 80% @ Fraunhofer IMS

The RISC-V processor AIRISC, a 32-bit RISC (Reduced Instruction Set Computer) architecture, now features instruction set extensions and coprocessors for efficient neural network computation.

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3D Integration @ Fraunhofer IMS

With wafer-to-wafer and chip-to-wafer bonding, Fraunhofer IMS offers two powerful and established processes for 3D integration of sensors.

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3D integration in the MST Lab&Fab of the Fraunhofer IMS

Fraunhofer IMS can rely on years of experience and technological expertise in the development and manufacture of optical sensors for numerous applications.

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Fraunhofer IPMS RISC-V processor core is supported by de-bugging tool from Lauterbach

Fraunhofer IMS has been developing and manufacturing CMOS image sensors for more than 30 years.

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Ferroelectric properties of AlScN open up development potential for semiconductor technology, e.g. for NGC applications or neuromorphic electronics @ Fraunhofer ISIT

There is an extremely broad field of research on the horizon, both scientifically and in terms of industrial implementation, which will accompany ISIT for many years to come.

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Innovative components, e.g. for next generation computing @ Fraunhofer ISIT

Fraunhofer ISIT supports the continuous miniaturization of power electronics applications while increasing power density on system and device level and offers the development of devices such as application specific silicon based PowerMOS transistors, IGBTs and diodes with reverse bias capabilities up to 1200V.

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3D Integration @ Fraunhofer IZM

3D system integration is one of the most important topics in current packaging and interconnection. Based on the vertical stacking of system components the concept offers specific advantages with regard to the heterogeneous integration of different components, such as sensors, processors, memories or antennas.

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3D integration at component level @ Fraunhofer IZM

Fraunhofer IZM’s research into photonics for communication and sensor systems, in which we combine optoelectronics and microoptics, has a three-fold aim: miniaturization, improving efficiency and increasing functionality.

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Fraunhofer Cluster 3D Integration honored with InCites Award @ Fraunhofer IZM-ASSID

The Fraunhofer cluster 3D Integration headed by Fraunhofer IZM-ASSID has won the coveted "2016 3D InCites Award for Excellence in 3D Packaging Technologies" in the "Research Institute of the Year" category at this year’s SEMICON West expo.

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Trend topic Chiplets @ Fraunhofer IZM

Fraunhofer IZM has been behind many of the advances in micro-bumping for flip-chip integration with extremely dense contacts, as are now used in chip stacking. 

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Interview with Michael Töpper on chiplets, especially as a solution for the automotive sector (2019) @ Fraunhofer IZM

Michael Töpper speaks to RealIZM about whether this new system architecture can really become the basic structure of the future industry, whether they are the answer to Moore’s law, and whether scientific progress can keep up its pace in these developments.

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System Integration & Interconnection Technologies @ Fraunhofer IZM

The Fraunhofer Institute for Reliability and Microintegration IZM is working on the development and implementation of new concepts for the construction of highly integrated electronic and photonic systems.

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InP-BiCMOS Heterointegration @ Leibniz FBH

For system integration, terahertz circuits must be realized and connected, for example, to antenna structures. These structures and interconnections must maintain the highest possible bandwidth, should exhibit low losses, reproducibly match the model, and be inexpensive to manufacture.

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Technologies for smart systems, including the use of novel heterointegration techniques such as wafer bonding or chiplet transfer @ Leibniz IHP

The Technology Research for Smart Systems is consistently focused on a "More than Moore" strategy based on the 200 mm Si platform of the IHP.

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Heterointegration of devices and technologies @ Leibniz IHP

The research group Heterointegration of Devices and Technologies (HDT) combines different disciplines and expertise starting from material and devices, FEM modelling & simulation in multi-physical domains as well as semiconductor and assembly technologies to develop new components and technology modules with a strong focus on high frequency applications.

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